
Texas Instruments AM62A/AM62A-Q1 Arm®-Based Processors
Texas Instruments AM62A/AM62A-Q1 Arm®-Based Processors are part of the automotive-grade family of heterogeneous Arm processors. These processors include embedded Deep Learning (DL), vision processing acceleration and video, display interface, and extensive automotive peripheral and networking options. The AM62A/AM62A-Q1 processors are built for in-cabin monitoring systems and drivers, the next generation of eMirror systems, building automation, and factory automation.
The TI AM62A/AM62A-Q1 processors include an extensive peripheral set to enable system-level connectivity such as USB, camera interface, MMC/SD, OSPI, CAN-FD, and GPMC for parallel host interface to an external ASIC/FPGA. These processors support a secure boot for IP protection with the built-in Hardware Security Module (HSM). The AM62A/AM62A-Q1 processors employ advanced power management support for portable and power-sensitive applications.
The AM62A-Q1 processors are AEC-Q100 qualified for automotive applications.
Features
- Processor Cores:
- Up to Quad 64-bit Arm Cortex-A53 microprocessor subsystem at up to 1.4GHz
- Quad-core Cortex-A53 cluster with 512KB L2 shared cache with SECDED ECC
- Each A53 core has 32KB L1 DCache with SECDED ECC and 32KB L1 ICache with parity protection
- Single-core Arm Cortex-R5F at up to 800MHz, integrated as part of MCU channel with FFI
- 32KB ICache, 32KB L1 DCache, and 64KB TCM with SECDED ECC on all memories
- 512KB SRAM with SECDED ECC
- Single-core Arm Cortex-R5F at up to 800MHz, integrated to support device management
- 32KB ICache, 32KB L1 DCache, and 64KB TCM with SECDED ECC on all memories
- Deep learning accelerator based on Single-core C7x
- C7x floating point, up to 40 GFLOPS, 256-bit Vector DSP at 1.0GHz
- Matrix Multiply Accelerator (MMA), up to 2 TOPS (8b) at 1.0GHz
- 32KB L1 DCache with SECDED ECC and 64KB L1 ICache with parity protection
- 1.25MB of L2 SRAM with SECDED ECC
- Vision Processing Accelerators (VPAC) with Image Signal Processor (ISP) and multiple vision assist accelerators:
- 315 MPixel/s ISP; up to 5MP at 60fps
- Support for 12-bit RGB-IR
- Support for up to 16-bit input RAW format
- Line support up to 4096
- Wide Dynamic Range (WDR), Lens Distortion Correction (LDC), Vision Imaging Subsystem (VISS), and Multi-Scalar (MSC) support
- Output color format : 8-bits, 12-bits, and YUV 4:2:2, YUV 4:2:0, RGB, HSV/HSL
- Up to Quad 64-bit Arm Cortex-A53 microprocessor subsystem at up to 1.4GHz
- AEC-Q100 qualified (automotive)
- Security:
- Secure boot supported
- Hardware-enforced Root-of-Trust (RoT)
- Support to switch RoT via backup key
- Support for takeover protection, IP protection, and anti-rollback protection
- Trusted Execution Environment (TEE) supported
- Arm TrustZone-based TEE
- Extensive firewall support for isolation
- Secure watchdog/timer/IPC
- Secure storage support
- Replay Protected Memory Block (RPMB) support
- Dedicated Security Controller with user-programmable HSM core and dedicated security DMA and IPC subsystem for isolated processing
- Cryptographic acceleration supported
- Session-aware cryptographic engine with the ability to auto-switch key material based on the incoming data stream
- Supports cryptographic cores
- AES – 128-/192-/256-Bit key sizes
- SHA2 – 224-/256-/384-/512-Bit key sizes
- DRBG with a true random number generator
- PKA (Public Key Accelerator) to Assist in RSA/ECC processing for secure boot
- Session-aware cryptographic engine with the ability to auto-switch key material based on the incoming data stream
- Debugging security
- Secure software-controlled debug access
- Security aware debugging
- Secure boot supported
- Technology/package
- 16nm FinFET technology
- 18mm x 18mm, 0.8mm pitch full-array, 484-pin FCBGA (AMB)
Applications
- Driver monitoring systems (DMS)/occupancy monitoring systems (OMS)
- eMirror/camera mirror systems (CMS)
- Machine vision cameras
- Barcode scanners
- Front camera systems
- Stick-up cameras/video doorbells
- Autonomous mobile robots (AMR)
Videos
Functional Block Diagram

Additional Resources
- AM62Ax Arm-Based Processors Technical Reference Manual
- Application Note - AM625/AM623 and AM62A7/AM62A3 Schematic Design and Review Checklist
- Application Note - AM62Ax Maximum Current Ratings
- Application Note - Building an Edge AI Application for Automated Retail Scanner on AM6xA MPUs
- Application Note - Hardware Design Guide for AM62A Devices
- Application Note - Keyword Spotting Using AI at the Edge With Arm-Based Processors
- PMIC Solution for AM62A
- Technical Article - How Vision Processors Are Expanding Edge AI Capabilities in Video Doorbell and Smart Retail Designs
- User Guide - TPS65931211-Q1 PMIC User Guide for AM62A
- White Paper - Driver and Occupancy Monitoring Systems on AM62A
- White Paper - Camera Mirror Systems on AM62A
- White Paper - Easing the Pain of Safety Certified System Development