STMicroelectronics STWBC2-HP Digital Controller
STMicroelectronics STWBC2-HP Digital Controller is specifically built to design Qi-certified Wireless Power TX applications. The STWBC2-HP is a SiP with an STM32™ microcontroller (STM32G071), and an application-specific front-end die. The STMicro STWBC2-HP can drive the DC-DC and half- or full-bridge inverter stages of a generic Qi wireless battery charging TX. The device generates and controls the relevant PWM signals employing a PWM machine capable of 1.47ns resolution. The front-end die includes a 40MHz PLL and a 17-step DLL to achieve these PWM signals.The STWBC2-HP front end is capable of working from any DC voltage in the range of 4.1V to 24V and embeds:
• 3x half-bridge drivers capable of driving both the FB inverter or the DC-DC MOSFET
• 2x PWM outputs for external gate drivers
• 2x LED/speaker drivers
• 3.6V/5V monolithic buck DC-DC to supply the analog portion of the die
• 3.3V LDO to supply the STM32
• 1.8V LDO to supply the core
• 6V to 9V voltage doubler to supply the gate drivers
• Resonant tank current, voltage, and phase sense circuitry, and Q-factor driver
• USB D+/D- external interface pins for USB PD
Features
- Digital controller for Qi-certified wireless power transmitters
- Compliant with WPC 1.3
- Power class 0 BPP (5W) and EPP (15W)
- Power Tx design topologies MP-A2 and MP-A22
- Proprietary ST Super Charge extension for high-power charging
- SiP with µC and front-end device:
- ARM 32-bit Cortex™-M0+ CPU, frequency up to 64MHz
- 3x half-bridge drivers
- Embedded 3.6V/5V DC-DC
- 3.3V and 1.8V LDOs
- 6V to 9V voltage doubler
- Qi FSK programmable modulator
- Integrated current, voltage, and phase demodulators
- Integrated current and voltage sensors
- Support for half- and full-bridge topologies with input DC-DC
- Single and multi-coil topologies
- Support for limited power sources such as 5V 500mA USB
- VIN operative range of 4.1V to 24V
- USB power delivery interface
- Communication interfaces
- UART
- SPI (up to 28Mbit/s)
- I2C (up to 1Mbit/s)
- Up to 8x GPIOs
- Peripherals
- 8-channel 12-bit 0.5µs ADC
- Low-side differential current sensor
- Q-Factor driver
- Memory
- 128Kbytes of Flash memory with ECC
- 32Kbytes of SRAM with HW parity check
- Development support with serial wire debug (SWD)
- Operating temperature of -40°C up to +125°C
- VFQFPN68L 8mm x 8mm, 0.4mm pitch package
- 96-bit unique ID
Architecture
AFE Block Diagram
Published: 2023-05-08
| Updated: 2024-04-25
