
Western Design Center W65C816S 8- / 16-Bit Microprocessors
Western Design Center W65C816S 8- / 16-bit Microprocessors are fully static CMOS devices that extend addressing to a full 16MB. Western Design Center W65C816S Microprocessors offer the advantages of CMOS technology, including increased noise immunity, higher reliability, and greatly reduced power requirements. WDC W65C816S MPUs include a software switch that determines whether the processor is in an 8-bit emulation mode or in the native mode, allowing existing systems to use the expanded features. These WDC microprocessors include full 16-bit ALU, Accumulator, Stack Pointer, and Index Registers. The W65C816S also provides low power consumption (300µA@1MHz).Features
- Advanced fully static CMOS design for low power consumption and increased noise immunity
- Wide operating voltage range, 1.8+/-5%, 2.5+/-5%, 3.0+/-5%, 3.3+/-10%, 5.0+/-5% specified for use with advanced low voltage peripherals
- Emulation mode allows complete H/W and S/W compatibility with 65xx designs
- 24-bit address bus provides access to 16MB of memory space
- Full 16-bit ALU, Accumulator, Stack Pointer, and Index Registers
- Valid Data Address (VDA) and Valid Program Address (VPA) output for dual cache and cycle steal DMA implementation
- Vector Pull (VPB) output indicates when interrupt vectors are being addressed
- Abort (ABORTB) input and associated vector supports processor repairs of bus error conditions
- Low power consumption (300uA@1MHz)
- Separate program and data bank registers allow program segmentation or full 16 Mbyte linear addressing
- New Direct Register and stack relative addressing provides capability for re-entrant, recursive and relocatable programming
- 24 addressing modes - 13 original W65C02S modes with 92 instructions using 256 opcodes
- Wait for Interrupt (WAI) and Stop-the-Clock (STP) instructions further reduce power consumption, decrease interrupt latency, and allows synchronization with external events
- Co-Processor (COP) instruction with associated vector supports co-processor configurations, i.e., floating-point processors
- Block moveability
Block Diagram

Published: 2011-10-07
| Updated: 2022-03-11