Western Design Center W65C02S 8-Bit Microprocessors

Western Design Center W65C02S 8-bit Microprocessors are low-power, cost-sensitive devices with a fully static core and a PHI2 clock that can be stopped when it is in a high or low state. Western Design Center W65C02S MPUs have a variable-length instruction set and a manually optimized core size that make these devices an excellent choice for low power System-on-Chip (SoC) designs. The WDC W65C02S has a 16-bit address bus providing access to 65,536 bytes of memory space. These 8-bit microprocessors also feature low power consumption (150µA@1MHz).


  • 8-bit data bus
  • 16-bit address bus provides access to 65,536 bytes of memory space
  • 8-bit ALU, Accumulator, Stack Pointer, Index Registers, Processor Status Register
  • 16-bit Program Counter
  • 69 instructions
  • 16 addressing modes
  • 212 Operation Codes (OpCodes)
  • Vector Pull (VPB) output indicates when interrupt vectors are being addressed
  • WAit-for-Interrupt (WAI) and SToP (STP) instructions reduce power consumption, decrease interrupt latency, and provide synchronization with external events
  • The variable-length instruction set provides for lower power and smaller code optimization over fixed-length instruction set processors
  • Fully static circuitry
  • Wide operating voltage range, 1.8+/-5%, 2.5+/-5%, 3.0+/-5%, 3.3+/-10%, 5.0+/-5% specified
  • Low Power consumption, 150uA@1MHz

Block Diagram

Block Diagram - Western Design Center W65C02S 8-Bit Microprocessors
Published: 2011-10-07 | Updated: 2022-03-11