Western Design Center 65xx Engineering Development Systems

Western Design Center 65xx Engineering Development Systems are educational and industrial-strength Engineering Development Systems based around world-renowned 8/16-bit microprocessors. The W65C816SXB and W65C02SXB feature vast I/O provided by the onboard W65C22 VIA, W65C21 PIA, and W65C51 ACIA peripheral ports. The 816 SXB offers easy access to extensive flexibility in design possibilities using Addressable Register Architecture (ARA). The addition of the XBus allows for expansion beyond the standard onboard peripherals by providing full data bus, address bus, and control signal access. The Western Design Center W65C134SXB and W65C265SXB feature proven functionality for applications in production that require in-system diagnostics featuring internal system monitor ROM. Suppose the user needs robust math for applications in sensing, such as pressure, temperature, revolutions per minute, flow monitoring and control, variable climate control, or other systems for scientific, automotive, communications, home appliance/automation. In that case, the user will benefit from the ANSI Standard C compiler.

Features

  • W65C816SXB and W65C02SXB Features
    • MPU running at 8MHz
    • 2 x W65C22N VIA(1/2) ‐ one for USB FIFO interface and one VIA expansion port
    • 1 x W65C21 PIA with PIA expansion port
    • 1 x W65C51N ACIA with ACIA expansion port
    • 1 x XBus02 or XBus816 connector with full address, data, and control lines of the processor and three external chip selects
    • 1 x 128Kbytes FLASH ROM (32PLCC socket) mapped as upper 32KB of memory map with overlays off of two IO pins from W65C22 TIDE (VIA2) port
    • 1 x 32Kbytes SRAM
    • Programming/debug interface - FTDI245 FIFO VIA2 (W65C22N) using the onboard ROM monitor
    • Micro USB connector - USB power and debugging interface
  • W65C134SXB and W65C265SXB Features
    • MCU operating at 3.6864MHz
    • 1 x 32 Kbytes SRAM
    • 1 x 128 Kbytes FLASH ROM (32PLCC socket) mapped as upper 32KB of memory map with overlays off of two IO pins (P43 = FA15; P44 = FAMS)
    • 1 x XBus 134 or 265 connectors (50 Pin) with full data, address, and control lines for system expansion
    • 3 x 10 IO connectors (Ports 4/5/6)
    • TIDE programming interface - FTDI232 UART interfaced to S3 (P66/P67/P56/P57) serial port of the W65C265S using the MASK serial monitor
    • 5V powered by a micro USB connector

Block Diagrams

Published: 2015-01-08 | Updated: 2022-03-11