
STMicroelectronics STM32 L5 Ultra-Low-Power MCUs
STMicroelectronics STM32 L5 Ultra-Low-Power MCUs are designed for an embedded application that requires more security and low power consumption. These MCUs are based on Arm® Cortex®-M33 processor and its TrustZone® for Armv8-M combined with ST security implementation. The STM32 L5 MCUs feature 512Kbytes of flash memory and 256Kbytes of SRAM. With the help of a new core and a new ST ART Acccelerator™, the STM32 L5 MCUs reaches an upgraded level of performance. These STM32 L5 MCUs offer a large portfolio with 7 packages and support up to 125°C ambient temperature.Features
- Ultra-low-power with Flex Power Control:
- 1.71V to 3.6V power supply range
- -40°C to +85/+125°C temperature range
- Batch Acquisition Mode (BAM)
- 187nA in VBAT mode: supply for RTC and 32x32-bit backup registers
- 17nA shutdown mode (5 wakeup pins)
- 108nA standby mode (5 wakeup pins)
- 222nA standby mode with RTC
- 3.16μA stop 2 with RTC
- 106μA/MHz run mode (LDO mode)
- 62μA/MHz run mode @3V (SMPS step-down converter mode)
- 5µs wakeup from stop mode
- Brownout Reset (BOR) in all modes except shutdown
- Core:
- Arm 32-bit Cortex-M33 CPU with TrustZone and FPU
- ART Accelerator:
- 8-Kbyte instruction cache allowing 0-wait-state execution from Flash memory and external memories; frequency up to 110MHz, MPU, 165 DMIPS, and DSP instructions
- Memories:
- Up to 512Kbyte Flash and two banks read-while-write
- 256Kbytes of SRAM including 64Kbytes with hardware parity check
- External memory interface supporting SRAM, PSRAM, NOR, NAND, and FRAM memories
- OCTO-SPI memory interface
- Security:
- Arm TrustZone and securable I/Os, memories, and peripherals
- Flexible life cycle scheme with Readout Protection (RDP)
- Root of trust thanks to unique boot entry and Hide Protection (HDP) area
- Secure Firmware Installation (SFI) thanks to embedded Root Secure Services (RSS)
- Secure firmware upgrade support with TF-M
- HASH hardware accelerator
- Active tamper and protection against temperature, voltage, and frequency attacks
- True random number generator NIST SP800-90B compliant
- 96-bit unique ID
- 512 bytes OTP for user data
- Clock management:
- 4MHz to 48MHz crystal oscillator
- 32kHz crystal oscillator for RTC (LSE)
- Internal 16MHz factory-trimmed RC (±1%)
- Internal low-power 32kHz RC (±5%)
- Internal multispeed 100kHz to 48MHz oscillators and auto-trimmed by LSE (better than ±0.25% accuracy)
- Internal 48MHz with clock recovery
- 3 PLLs for system clock, USB, audio, and ADC
STM32 L5 Circuit Diagram

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Published: 2020-01-22
| Updated: 2022-07-07