
Texas Instruments CDCE6214Q1TM Ultra-Low Power Clock Generator
Texas Instruments CDCE6214Q1TM Ultra-Low Power Clock Generator is a 4-channel, medium-grade jitter clock generator for automotive applications that can generate five independent clock outputs. These outputs are selectable between various modes of drivers. The input source can be a single-ended or differential input clock source or a crystal. The Texas Instruments CDCE6214Q1TM features a frac-N PLL to synthesize unrelated base frequencies from any input frequency.
Features
- AEC-Q100 qualified for automotive applications
- Temperature grade 2 (–40°C to +105°C)
- Functional Safety-Capable
- Documentation available to aid functional safety system design
- Configurable high-performance, low-power, frac-N PLL with RMS jitter with spurs (12kHz to 20MHz, Fout > 100MHz) as
- Integer mode
- 350fs typical, 600fs maximum differential output
- 1.05ps typical, 1.5ps maximum LVCMOS output
- Fractional mode
- 1.7ps typical, 2.1ps maximum differential output
- 2.0ps typical, 4.0ps maximum LVCMOS output
- Integer mode
- Supports PCIe Gen1/2/3/4 with SSC and Gen 1/2/3/4/5 without SSC
- 2.335GHz to 2.625GHz internal VCO
- Typical power consumption of 65mA for 4-output channel, 23mA for 1-output channel
- Universal clock input, two reference inputs for redundancy
- 10MHz to 200MHz differential AC-coupled or LVCMOS
- 10MHz to 50MHz crystal
- Flexible output clock distribution
- Four-channel dividers of up to five unique output frequencies from 24kHz to 328.125MHz
- Combination of LVDS-like, LP-HCSL, or LVCMOS outputs on OUT0 – OUT4 pins
- Glitchless output divider switching and output channel synchronization
- Individual output enable through active-low GPIO and register
- Frequency margining options
- DCO mode with frequency increment/decrement with 10ppb or less step-size
- 100kHz to 1.6MHz fully-integrated, configurable loop bandwidth
- Single or mixed supply for level translation of 1.8V, 2.5V, and 3.3V
- Configurable GPIOs and flexible configuration options
- I2C-compatible interface up to 400kHz
- Integrated EEPROM with two pages and an external select pin with In-situ programming allowed
- Supports 100Ω systems
- Low electromagnetic emissions
- 24-pin VQFN (4mm × 4mm) small footprint
Applications
- PCIe Gen 1 - Gen 5 clocking
- Advanced driver assistance systems (ADAS) - sensor fusion
- Infotainment and cluster - automotive head unit - eAVB
- Data center and enterprise computing
- PC and notebooks
- Enterprise machine - multifunction printer
- Test and measurement - handheld equipment
Functional Block Diagram

Published: 2023-08-01
| Updated: 2023-09-15