onsemi RSL10 SiP Evaluation Board (RSL10−SIP−001GEVB)

onsemi RSL10 SiP Evaluation Board (RSL10−SIP−001GEVB) is used for evaluating the performance and capabilities of the RSL10 Multi-Protocol BLUETOOTH® 5 System-in-Package (SiP). The board also enables the developing, demonstrating, and debugging of ultra-low-power wireless applications based on the RSL10 SiP. The board provides access to all input and output connections via 0.1" standard headers. The RSL10 SiP Evaluation Board features an onboard communication interface circuit, providing communication to the board from a host PC. The communication interface translates RSL10 SiP SWJ-DP debug port signals to the USB of the host PC. onsemi RSL10 SiP Evaluation Board (RSL10−SIP−001GEVB) also offers an on-board 4-bit Level Shifter for debugging. The Level Shifter translates the I/O signal level of the RSL10 SiP to a 3.3V digital logic level. The Level Shifter can be enabled and disabled as needed.

Features

Onboard J-Link solution provides an SWJ−DP
Serial-wire and/or JTAG interface enables debugging via a USB connection with the PC
Alternate onboard SWJ−DP (serial-wire and/or JTAG) interface for Arm® Cortex®−M3 processor debugging
Access to all RSL10 SiP peripherals via standard 0.1" headers

Onboard 4-bit level translator to translate the LPDSP32 debug interface at low voltage to a 3.3V JTAG debugger
Integrated antenna (included as part of the RSL10 SiP)
Compliance with the Arduino form factor