Microchip Technology PIC16(L)F18326/46 MCUs with XLP
Microchip Technology PIC16(L)F18326/46 MCUs with eXtreme Low Power (XLP) are full-featured MCUs with a low pin count. These MCUs feature analog, core independent peripherals, and communication peripherals with XLP for various general-purpose and low-power applications. The PIC16(L)F18326/46 MCUs offer Peripheral Pin Select (PPS) functionality. This enables pin mapping when using digital peripherals (CLC, CWG, CCP, PWM, and communications) to add flexibility to the application design. The PIC16(L)F18326 MCUs are offered in 14-pin PDIP, SOIC, TSSOP packages, and 16-pin UQFN packages. The PIC16(L)F18346 MCUs come in 20-pin PDIP, SOIC, SSOP, and UQFN packages.Features
- Core
- C compiler optimized RISC architecture
- Operating speed
- 32MHz clock input (DC)
- 125ns minimum instruction cycle
- Interrupt capability
- 16-level deep hardware stack
- Up to four 8-bit timers
- Up to three 16-bit timers
- Low-current Power-On Reset (POR)
- Power-up Timer (PWRTE)
- Brown-Out Reset (BOR) option
- Low-Power BOR (LPBOR) option
- Extended Watchdog Timer (WDT) with a dedicated on-chip oscillator for reliable operation
- Programmable code protection
- Memory
- 28KB program flash memory
- 2KB data SRAM memory
- 256B of EEPROM
- Direct, indirect, and relative addressing modes
- Operating characteristics
- Operating voltage range
- 1.8V to 3.6V (PIC16LF18326/18346)
- 2.3V to 5.5V (PIC16F18326/18346)
- Temperature range
- -40°C to +85°C (industrial)
- -40°C to +125°C (extended)
- Operating voltage range
- eXtreme Low-Power (XLP) features
- 40nA @ 1.8V (typical) sleep mode
- 250nA @ 1.8V (typical) watchdog timer
- 300nA @ 32kHz secondary oscillator
- Operating current
- 8μA @ 32kHz, 1.8V (typical)
- 37μA/MHz @ 1.8V (typical)
- Power-saving functionality
- IDLE mode
- Ability to put the CPU core to sleep while internal peripherals continue operating from the system clock
- DOZE mode
- Ability to run the CPU core slower than the system clock used by the internal peripherals
- SLEEP mode
- Lowest power consumption
- Peripheral Module Disable (PMD)
- Peripheral power disable hardware module to minimize power consumption of unused peripherals
- IDLE mode
- Analog peripherals
- 10-bit Analog-to-Digital Converter (ADC)
- 17 external channels
- Conversion available during Sleep
- Comparator
- Two comparators
- Fixed voltage reference at non-inverting input(s)
- Comparator outputs externally accessible
- 5-bit Digital-to-Analog Converter (DAC)
- 5-bit resolution, rail-to-rail
- Positive reference selection
- Unbuffered I/O pin output
- Internal connections to ADCs and comparators
- Voltage reference
- Fixed voltage reference with 1.024V, 2.048V, and 4.096V output levels flexible oscillator structure
- High-precision internal oscillator
- Software-selectable frequency range up to 32MHz
- ±1% at nominal 4MHz calibration point
- 4x PLL with external sources
- Low-power internal 31kHz Oscillator (LFINTOSC)
- External low-power 32kHz crystal Oscillator (SOSC)
- External oscillator block with
- Three crystal/resonator modes up to 20MHz
- Three external clock modes up to 20MHz
- Fail-safe clock monitor
- Detects clock source failure
- Oscillator Start-up Timer (OST)
- Ensures stability of crystal oscillator sources
- 10-bit Analog-to-Digital Converter (ADC)
- Digital peripherals
- Configurable Logic Cell (CLC)
- Four CLCs
- Integrated combinational and sequential logic
- Complementary Waveform Generator (CWG)
- Two CWGs
- Rising and falling edge dead-band control
- Full-bridge, half-bridge, and 1-channel drive
- Multiple signal sources
- Capture/Compare/PWM (CCP) modules
- Four CCPs
- 16-bit resolution for Capture/Compare modes
- 10-bit resolution for PWM mode
- Pulse-Width Modulators (PWM)
- Two 10-bit PWMs
- Numerically Controlled Oscillator (NCO)
- Precision linear frequency generator (@50% duty cycle) with 0.0001% step size of the source input clock
- 0Hz < FNCO < 32MHz input clock
- FNCO/220 resolution
- Serial communications
- EUSART
- RS-232, RS-485, and LIN compatible
- Auto-Baud detect and auto-wake-up on start
- Master Synchronous Serial Port (MSSP)
- SPI
- I2C, SMBus, and PMBus™ compatible
- EUSART
- Data Signal Modulator (DSM)
- Modulates a carrier signal with digital data to create custom carrier synchronized output waveforms
- Up to 18 I/O pins
- Individually programmable pull-ups
- Slew rate control
- Interrupt-on-change with edge-select
- Input level selection control (ST or TTL)
- Digital open-drain enable
- Peripheral Pin Select (PPS)
- I/O pin remapping of digital peripherals
- Timer modules
- Timer0
- 8/16-bit timer/counter
- Synchronous or asynchronous operation
- Programmable prescaler/postscaler
- Time base for capture/compare function
- Timer1/3/5 with gate control
- 16-bit timer/counter
- Programmable internal or external clock sources
- Multiple gate sources
- Multiple gate modes
- Time base for capture/compare function
- Timer2/4/6
- 8-bit timers
- Programmable prescaler/postscaler
- Time base for PWM function
- Timer0
- Configurable Logic Cell (CLC)
PIC16(L)F18346 Block Diagram
Published: 2019-05-02
| Updated: 2023-05-26