Microchip Technology dsPIC33CK1024MP710 Digital Signal Controllers

Microchip Technology dsPIC33CK1024MP710 Digital Signal Controllers (DSCs) with High-Resolution PWM and CAN Flexible Data-Rate (CAN FD) offer real-time deterministic performance and enable high-performance control applications. The dsPIC33CK1024MP710 controllers feature a single 100MHz dsPIC® DSC core with integrated DSP and enhanced on-chip peripherals for advanced sensing/control, robust general embedded, motor control, digital power, and high-performance embedded applications. These DSCs enable the design of high-performance, precision motor control systems that are more energy efficient, quieter in operation, and provide extended motor life.

The Microchip Technology dsPIC33CK1024MP710 family can control BLDC, PMSM, ACIM, SR, and stepper motors. Ideal for switched-mode power supplies (AC/DC, DC/DC, UPS, and PFC), the DSCs provide high-precision digital control of Buck, Boost, Fly-Back, Half-Bridge, Full-Bridge, LLC, and other power circuits to reach the highest possible energy efficiency. These devices are also ideal for high-performance general-purpose/robust applications.

Features

  • AEC-Q100 qualified
  • Operating conditions
    • 3V to 3.6V, -40°C to +125°C from DC to 100 MIPs
    • 3V to 3.6V, -40°C to +150°C from DC to 70 MIPs
  • dsPIC33CK CPU
    • 256Kbytes to 1024Kbytes of Program Flash with ECC and 128Kbytes of Data RAM
    • Fast six-cycle divide
    • Flash with dual partition for LiveUpdate capabilities
    • LiveUpdate
    • Code efficient (C and Assembly) architecture
    • 40-Bit wide accumulators
    • Single-cycle (MAC/MPY) with Dual Data Fetch
    • Single-cycle, mixed-sign MUL plus Hardware Divide
    • 32-Bit multiply support
    • 5x sets of interrupt context selected registers for fast interrupt response
    • Zero overhead looping
    • RAM Memory Built-In Self-Test (MBIST)
  • Clock management
    • Fast RC (FRC)
    • Internal oscillator
    • Programmable PLLs and oscillator clock sources
    • Reference clock output
    • Fail-Safe Clock Monitor (FSCM)
    • Fast wake-up and start-up
    • 8MHz Backup FRC (BFRC) with a divider (244 decimal) to provide a nominal 32.768kHz output with a 50% duty cycle
  • Power management
    • Low-power management modes (Sleep, Idle, and Doze)
    • Integrated power-on reset and brown-out reset
  • High-resolution PWM with fine edge placement
    • Up to 12x PWM channels
    • 250ps PWM resolution
  • Timers, Output Compare, and Input Capture
    • 1x general purpose 16-Bit timer
    • Peripheral Trigger Generator (PTG) module
    • 8x SCCP modules
      • Timer, Capture/Compare, and PWM modes
      • 16- or 32-bit time base
      • 16- or 32-bit capture
      • Four-deep capture buffer
      • Fully asynchronous operation, available in Sleep modes
    • 9x MCCP/SCCP modules which include Timer, Capture/Compare, and PWM
      • 1x MCCP
      • 8x SCCPs
      • 16- or 32-bit time base
      • 16- or 32-bit capture
      • Four-deep capture buffer
  • Advanced analog
    • 5x ADC modules
      • 12-bit, 3.5Msps ADC
      • Up to 27x conversion channels
      • 250ns conversion latency
    • 6x DAC/analog comparator modules
      • 12-bit DACs with hardware slope compensation
      • 15ns analog comparators
    • Shared DAC/analog comparator outputs
    • 3x Op Amp modules, 20MHz GBW
      • 40V/s slew rate
      • ±1mV offset
  • Communication interfaces
    • 3x UART modules with support for DMX and LIN/J2602 protocols
    • 3x 4-wire SPI/I2S modules
    • 2x CAN Flexible Data-Rate (FD) modules
    • 3x I2C modules with support for SMBus
    • PPS to allow function remap
    • 2x SENT modules
  • 8x Direct Memory Acces (DMA) channels
  • Peripherals
    • 3x Quadrature Encoder Interfaces (QEIs) with 4x inputs (Phase A, Phase B, Home, and Index)
    • 8x Configurable Logic Cells (CLCs) with internal connections to select peripherals and PPS
    • 2x Current Bias Generators (CBGs)
  • Debugger development support
    • In-circuit and in-application programming
    • 3x complex and 5x simple breakpoints
    • IEEE 1149.2 compatible (JTAG) boundary scan
    • Trace buffer and run-time watch
  • Safety
    • DMT (Deadman Timer)
    • ECC (Error Correcting Code) for Flash memory
    • WDT (Watchdog Timer)
    • CodeGuard™ security
    • CRC (Cyclic Redundancy Check)
    • Flash OTP by ICSP™ Write Inhibit
    • RAM Memory Built-In Self-Test (MBIST)
    • 2-speed start-up
    • Fail-Safe Clock Monitoring (FSCM)
    • Backup FRC (BFRC)
    • Capless internal voltage regulator
    • Virtual pins for redundancy and monitoring
  • ISO 26262 compliant and developed following the ISO 26262 process

Applications

  •  Power Factor Correction (PFC)
    • Interleaved PFC
    • Critical conduction PFC
    • Bridgeless PFC
  • DC/DC converters
    • Buck, boost, forward, flyback, and push-pull
    • Half/full-bridge
    • Phase-shift full-bridge
    • Resonant converters
  • DC/AC
    • Half/full-bridge inverters
    • Resonant inverters
  • Motor control
    • BLDC
    • PMSM
    • SR
    • ACIM

Typical Application Schematics

Block Diagram

Block Diagram - Microchip Technology dsPIC33CK1024MP710 Digital Signal Controllers

CPU Block Diagram

Block Diagram - Microchip Technology dsPIC33CK1024MP710 Digital Signal Controllers
Published: 2023-06-13 | Updated: 2023-10-09