Most people don't consider security in modern processor architectures until the next big security vulnerability appears. The recent Meltdown/Spectre incident allowed a rogue process to read memory for which it had no privileged access. In another recent incident, Mirai malware infected and collected consumer internet products into a massive botnet. Learning from these events is crucial, and to their credit, processor vendors consider these as well as the entire attack surface to help improve a device’s security.
Here, we'll explore some of the most important features for edge computing and the security measures that will help keep your device and its data secure.
Most instruction sets are considered “general purpose” to serve the widest developer market, but instruction sets are evolving toward very specific applications. For example, machine learning is driving instructions focused toward vector operations for neural networks. Security is also addressed with instructions and silicon that support hash and cryptographic function acceleration. Arm, Intel®, and AMD include cryptographic instructions to significantly improve the performance of Advanced Encryption Standard (AES) encryption and hash generation (both key in secure authentication and encryption).
Instructions to accelerate hash and crypto functions mean that they can be done in real-time with little interference to the operation of the device. It also means that they can be applied in other ways, such as secure boot, firmware update (both integrity checking and update authentication), as well as in general communication where data is encrypted and decrypted between the endpoints.
An alternative to processor instructions to accelerate cryptographic functions is to offload them altogether to another processor. This can be done through a secure crypto-processor that is dedicated to security functions. The Trusted Platform Module (TPM) is an implementation of this concept and provide secure boot functions as well as storage encryption.
Virtualization, as in hypervisors running on bare metal hardware mediating access from guest virtual machines, is another area where processor architectures are evolving. While virtualization is primarily a server-based feature, it is finding applications in embedded devices as well as a way to securely partition functionality.
Processor architectures now include new privilege levels and the ability to define what secure execution environment is and what is user-land (and therefore not related to virtualization and the additional scrutiny that it brings).
Implementations of security-enhanced virtualization include AMD’s Secure Encrypted Virtualization (SEV) and Intel®’s Software Guard Extension (SGX). These features provide hardware-based memory encryption to protect processes running at higher privilege levels.
Many applications can be divided into two categories; trusted code and untrusted code. This isn’t to say that untrusted code isn’t trustworthy, but the requirement exists to segregate code. For example, if you implement security functionality, you’ll want this implemented separately (on its own island, if you will).
Major processor architecture implements this in what’s called a trusted execution environment (TEE). This allows trusted applications to execute in a hardware environment that is partitioned from regular code. The processor itself implements two virtual cores; one secure and other non-secure. In the Arm world, this is called TrustZone, and Intel ® calls this “Trusted Execution Technology.”
There is no such thing as a completely secure device, but by building devices that incorporate state-of-the-art security, dissuades attackers from attempting to exploit the device. IoT has a duplicative affect in that once a vulnerability is discovered, it can quickly turn an internet-connected device into a botnet zombie. Incorporating security into the design process from the start can help to keep your next device from being the next security headline.
M. Tim Jones is a veteran embedded firmware architect with over 30 years of architecture and development experience. Tim is the author of several books and many articles across the spectrum of software and firmware development. His engineering background ranges from the development of kernels for geosynchronous spacecraft to embedded systems architecture and protocol development.
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