Swissbit DRAM memory modules are industry standard 200/204-pin 8-byte DDR2/DDR3 SDRAM small outline dual-in-line modules which are organized as x64 high speed CMOS memory arrays. The module uses internally configured octal-bank SDRAM devices. The DDR3 module uses double data rate architecture to achieve high-speed operation. These memory modules operate from a differential clock (CK and CK#). READ and WRITE accesses to the SDRAM modules are burst-oriented; accesses start at a selected location and continue for a programmed number of locations in a programmed sequence. The burst length is either four or eight locations. An auto precharge function can be enabled to provide a self-timed row precharge that is initiated at the end of a burst access. Swissbit DRAM memory modules have a multibank architecture which allows a concurrent operation that is providing a high effective bandwidth. Swissbit uses internally developed application software to test 100% of all modules under real world conditions with diverse pattern and stress methods and to cover the complete memory array including ECC components by constantly adapting to the latest memory controller features. For industrial temperature grade modules the application tests are performed at -40°C and 85°C T AMBIENT.