Spansion S25FL512S FL-S NOR Flash Memory Devices
The Spansion S25FL512S FL-S NOR is a VIO = VCC = 2.7V to 3.6V Flash non-volatile Memory Device using 65 nm MirrorBit technology. Designed using Eclipse architecture with a 512-byte Page Programming Buffer, the 512-Mb S25FL512S FL-S NOR allows users to program up to 256 words (512 bytes) in one operation, resulting in faster effective programming and erase than prior generation SPI program or erase algorithms. The device connects to a host system via a Serial Peripheral Interface (SPI) and supports traditional SPI single bit serial input and output (Single I/O or SIO), optional two bit (Dual I/O or DIO), and four bit (Quad I/O or QIO) serial commands. As part of the FL-S family, S25FL512S FL-S NOR provides support for Double Data Rate (DDR) read commands for SIO, DIO, and QIO that transfer address and read data on both edges of the clock. Using FL-S devices at the supported higher clock rates with QIO or DDR-QIO commands, the instruction read transfer rate can match or exceed traditional parallel interface, asynchronous, NOR flash memories while reducing signal count dramatically. S25FL512S FL-S NOR offers high density performance capabilities coupled with the flexibility and speed required by a variety of embedded applications. Spansion S25FL512S FL-S NOR is ideal for code shadowing, XIP, and data storage.