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Home » NEWEST Products » New by Manufacturer » Western Design Center » Western Design Center W65C134S / W65C265S MCUs
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Western Design Center W65C134S / W65C265S 8- / 16-bit Microcontrollers

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Western Design Center
W65C134S / W65C265S MCUs

Western Design Center W65C134S 8-bit and W65C265S 16-bit Microcontrollers are designed for Hi-Rel applications in which minimum power is required. The Western Design Center W65C134S 8-bit MCUs consist of a W65C02S Static CPU, 4096 bytes of ROM, 192 bytes of RAM, two 16-bit timers, and more. WDC W655C265S MCUs include a W65C816S Static CPU, 8Kb ROM, 576 bytes of RAM, processor-defined cache under software control, and more. The innovative architecture and demonstrated high performance of WDC W65C134S and W65C256S MCUs result in system cost-effectiveness and a wide range of computational power.

W65C134S Features
  • CMOS low power process
  • Operating TA= -40EC to +85EC
  • Single 2.8V to 5.5V power supply
  • Static to 8MHz clock operation
  • W65C02S compatible CPU
    • 8-bit parallel processing
    • Variable length stack
    • True indexing capability
    • Fifteen addressing modes
    • Decimal or binary arithmetic
    • Pipeline architecture
    • Fully static CPU
    • W65C816S 16-bit CPU compatible
  • Single chip microcomputer
    • Many power saving features
    • 56 CMOS compatible I/O lines
    • 4096 x 8 ROM on chip
    • 192 x 8 RAM on chip
  • Twenty-two priority encoded interrupts
  • UART 7/8-bit w/wo odd or even parity
  • 16M byte segmented address space
  • 64K byte linear address space
  • 4 x 16 bit timer/counters
  • Bus control register for external memory
  • Surface mount 68 and 80 lead packages
W65C265S Features
  • Hi-Rel low power CMOS process
  • Operating TA=0ºC to +70ºC
  • Single 2.8V to 5.5V power supply
  • Static to 8MHz clock operation
  • W65C816S compatible CPU
    • 8- and 16-bit parallel processing
    • Variable length stack
    • True indexing capability
    • Twenty-four address modes
    • Decimal or binary arithmetic
    • Pipeline architecture
    • Fully static CPU
  • Single chip microcomputer
    • 2 Tone Generators
    • 64 CMOS compatible I/O lines
    • 8K x 8 ROM on-chip
    • 576 x 8 RAM on-chip
  • 16Mbyte linear address space
  • Twenty-nine priority encoded interrupts
  • Four UARTS
  • Time of Day (ToD) clock features
  • 8 x 16 bit timer/counters
  • Bus Control Register
  • Many bus operating features and modes
  • 8 Programmable chip select outputs
  • Low cost surface mount 84 and 100 lead packages


  • Western Design Center
  • Semiconductors|Embedded Processors|IC-MCU/MPU