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Home » NEWEST Products » New by Manufacturer » Terasic Technologies » Terasic FPGA Dev Kits for Altera Cyclone II, III, & IV
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Terasic FPGA Development Kits for Altera Cyclone® II, III, & IV

Terasic FPGA Development Kits for Altera Cyclone® II, III, & IV

Terasic FPGA Development Kits for Altera Cyclone® II, III, & IV include a variety of boards and kits designed for testing and development with the Altera Cyclone FPGA family. Featured processors include the Cyclone IV EP4CE115 and EP4CE22F17C6N, Cyclone III EP3C16, EP3C25F324, and EP3C120F780, and the Cyclone II EP2C20 and EP2C35 FPGAs.


Terasic FPGA Development Kits for Altera Cyclone® IV


Terasic FPGA Development Kits for Altera Cyclone® IV include the DE2-115 Development & Education Board Kit--featuring the Cyclone IV EP4CE115, two kits based on the DE2-115--the VEEK-MT and the INK, and the DE0-Nano--featuring the Cyclone IV EP4CE22F17C6N FPGA.

Terasic DE2-115 Development & Education Board for Altera Cyclone® IV

The DE2-115 was built in response to increased versatile low-cost spectrum needs driven by the demand for mobile video, voice, data access, and the hunger for high-quality images. This kit offers an optimal balance of low cost, low power, and a rich supply of logic, memory, and DSP capabilities. The Cyclone EP4CE115 device equipped on the DE2-115 features 114,480 logic elements (LEs), the largest offered in the Cyclone IV E series, up to 3.9Mb of RAM, and 266 multipliers. In addition, it delivers an unprecedented combination of low cost and functionality and lower power compared to previous generation Cyclone devices.



The Video & Embedded Evaluation Kit (VEEK-MT) is a comprehensive design environment with everything embedded developers need to create processing-based systems, including a DE2-115 board and a capacitive LCD multimedia color touch panel which natively supports multi-touch gestures. A 5-megapixel digital image sensor, ambient light sensor, and 3-axis accelerometer make up the rich feature-set.

Terasic Video & Embedded Evaluation Kit for Altera Cyclone® IV


Terasic Industrial Networking Kit for Altera Cyclone® IV

The Industrial Networking Kit (INK) offers a comprehensive development platform for industrial communications and automation applications, featuring a DE2-115 board and an Industrial Communications Board (ICB-HSMC) that supports RS-485, RS-232, CAN, and additional I/O expansion. The INK gives industrial equipment designers greater flexibility in implementing real-time Ethernet communications with the availability of Industrial Ethernet IP cores. The Industrial Communication Board (ICB-HSMC) is designed to provide common industry standard interfaces for FPGA platforms that support RS-232, RS-485, and CAN connectivity through a High-Speed Mezzanine Connector (HSMC).

The DE0-Nano kit, featuring the Cyclone IV EP4CE22F17C6N, introduces a compact-sized FPGA development platform suited for prototyping circuit designs such as robots and "portable" projects. The board is designed to be used in the simplest possible implementation targeting the Cyclone IV device with up to 22,320 LEs. The advantages of the DE0-Nano board include its size and weight, as well as its ability to be reconfigured without carrying superfluous hardware, setting itself apart from other general purpose development boards. In addition, for mobile designs where portable power is crucial, the DE0-Nano provides designers with three power scheme options including a USB mini-AB port, 2-pin external power header, and two DC 5V pins.


Part Number Datasheet Product Featured Device
P0059 DE2-115 Development
& Education Board
Cyclone IV EP4CE115
P0103 Video & Embedded
Evaluation Kit (VEEK-MT)
Cyclone IV EP4CE115
+ 7" Multi-Touch LCD
+ Camera
P0061 Industrial Networking
Kit (INK)
Cyclone IV EP4CE115
+ Industrial
Communications Board
(ICB-HSMC)
P0082 DE0-Nano Development
& Education Board
Cyclone IV
EP4CE22F17C6N

DE2-115 Features
  • Cyclone® IV EP4CE115 FPGA
  • EPCS64 serial configuration device
  • On-board USB-Blaster circuitry
  • JTAG and AS mode configuration supported
  • Memory: 128MB (32Mx32bit) SDRAM, 2MB (1Mx16) SRAM,
    8MB (4Mx16) Flash with 8-bit mode, 32Kbit EEPROM
  • Display: 16x2 LCD module
  • Audio: 24-bit encoder/decoder(CODEC); line-in, line-out,
    and microphone-in jacks
  • On-board Clocking circuitry: 3x 50MHz oscillator clock inputs,
    SMA connectors (external clock input/output)
  • SD Card socket: Provides SPI and 4-bit SD mode for
    SD Card access
  • Two Gigabit Ethernet Ports: Integrated 10/100/1000 Gigabit Ethernet, supports Industrial Ethernet IP cores
  • 172-pin High Speed Mezzanine Card (HSMC): Configurable
    I/O standards (voltage levels: 3.3/2.5/1.8/1.5V)
  • USB Type A and B: Supports data transfer at full-speed
    and low-speed
  • 40-pin expansion port: Configurable I/O standards
    (voltage levels: 3.3/2.5/1.8/1.5V)
  • VGA-out connector: VGA DAC (high speed triple DACs)
  • DB-9 Serial connector: RS232 port with flow control
  • PS/2 connector: PS/2 connector for connecting a PS2 mouse
    or keyboard to the DE2-115
  • Remote control: Infrared receiver module
  • TV-in connector: TV decoder (NTSC/PAL/SECAM)
  • Power: Desktop DC input, switching and step-down
    regulators LM3150MH

DE0-Nano Features
  • Cyclone® IV EP4CE22F17C6N FPGA
  • On-board USB-Blaster circuit for programming
  • FPGA Serial Configuration Device (EPCS)
  • Memory: 32MB SDRAM, 2Kb I²C EEPROM
  • G-Sensor: ADI ADXL345, 3-axis accelerometer with high
    resolution (13-bit)
  • A/D Converter: NS ADC128S022, 8-Channel, 12-bit A/D
    converter; 50ksps to 200ksps
  • Clock System: On-board 50MHz clock oscillator
  • Power supply: USB Type mini-AB port (5V), 2x DC 5V pins of the GPIO headers (5V), 2-pin external power header (3.6-5.7V)
Cyclone IV EP4CE115 Specifications
  • 114,480 logic elements (LEs)
  • 3,888Kbits Embedded memory
  • 266 Embedded 18x18 multipliers
  • 4 General-purpose PLLs
  • 528 User I/Os

Cyclone IV EP4CE22F17C6N Specifications
  • 22,320 Logic elements (LEs)
  • 594Kbits Embedded memory
  • 66 Embedded 18x18 multipliers
  • 4 General-purpose PLLs
  • 153 Maximum FPGA I/O pins

VEEK-MT Features
  • DE2-115 Development Board
  • Capacitive LCD Touch Screen
    • 7in TFT-LCD (Thin Film Transistor
      Liquid Crystal Display) module with pixel resolution of 800*480
    • 16 million colors (8-bit RGB)
    • Module composed of LED backlight
    • Supports 24-bit parallel
      RGB interface
    • Converting the X/Y touch
      coordinates to corresponding digital data via Touch controller
  • 5-Megapixel Digital Image Sensor
  • Digital Accelerometer
  • Ambient Light Sensor

INK Features
  • DE2-115 Development Board
  • ICB-HSMC Board: HSMC connector for interface conversion, 2x CAN DB9 connector, 2x RS-485 DB9 connector, RS-232 DB9 connector, 2x 6-pin SPIO port, 12-pin SPIO port, 40-pin expansion port, 7x 10-pin headers for supported communication protocols (RS-232, CAN, RS-485) and signal measurement

Altera Cyclone IV FPGAs

Altera Cyclone® IV FPGAs extend the Cyclone FPGA series leadership in providing the market's lowest-cost, lowest-power FPGAs, now with a transceiver variant. Cyclone IV devices are targeted to high-volume, cost-sensitive applications, enabling system designers to meet increasing bandwidth requirements while lowering costs. Providing power and cost savings without sacrificing performance, along with a low-cost integrated transceiver option, Cyclone IV devices are ideal for low-cost, small-form-factor applications in the wireless, wireline, broadcast, industrial, consumer, and communications industries. Built on an optimized low-power process, the Altera Cyclone IV device family offers two variants. Cyclone IV E offers the lowest power and high functionality with the lowest cost. Cyclone IV GX offers the lowest power and lowest cost FPGAs with 3.125Gbps transceivers.
Learn more



Terasic FPGA Development Kits for Altera Cyclone® III


Terasic FPGA Development Kits for Altera Cyclone III include the DE0 Kit with the Cyclone III EP3C16 FPGA, the Nios II Embedded Evaluation Kit with the Cyclone III EP3C25F324 FPGA, and the Cyclone III Video Development System with the Cyclone III EP3C120F780 FPGA, which is also available with the DVI-HSMC daughter card.

Terasic DE0 Development & Education Board for Altera Cyclone® III


The DE0 Development & Education Board is designed in a compact size with all the essential tools for novice users to gain knowledge in areas of digital logic, computer organization, and FPGAs. It is equipped with the low-power, low-cost, and high performance Altera Cyclone III EP3C16 FPGA device, which offers 15,408 LEs.


The Nios II Embedded Evaluation Kit, Cyclone III Edition, features a low power, low-cost Cyclone III EP3C25F324 FPGA evaluation board for embedded developers, which can be used for easy access and implementation of their own designs using the LCD color touch panel. It includes the tools necessary to integrate powerful graphics within the FPGA by allowing software developers to install and evaluate the Nios II Embedded Design Suite (EDS) which is a comprehensive suite for software developers.

Terasic Nios II Embedded Evaluation Kit for Altera Cyclone® III
Terasic Cyclone III Video Development System for Altera Cyclone® III

The Cyclone III Video Development System is an ideal video processing platform using a Cyclone III device for high-end video applications, including DVI and HDMI. The package includes a Cyclone III FPGA development kit featuring an EP3C120F780 FPGA device with two available HSMC connectors to allow additional functionality and connectivity via optional HSMC daughter boards. The development system can also allow users to experience advanced image processing designs incorporating VIP, Altera's Video & Image Processing Suite MegaCore Functions.

The DVI-HSMC daughter card allows developers to access high quality and high resolution video signals that can support resolution up to 1600x1200. A complete DVI video controller design with source code is provided.


Part Number Datasheet Product Featured Device
P0037 DE0 Development &
Education Board
Altera Cyclone III
EP3C16
P0306 Nios II Embedded
Evaluation Kit
Altera Cyclone III
EP3C25F324 + Nios II
Embedded Design Suite
K0034
Cyclone III Video
Development System
(with DVI)
Altera Cyclone III
EP3C120F780 + DVI
K0035 Cyclone III Video
Development System
(w/o DVI)
Altera Cyclone III
EP3C120F780 + Software
DE0 Features
  • Cyclone III EP3C16 FPGA:
    • 15,408 LEs
    • 56 M9K Embedded Memory Blocks
    • 504K total RAM bits
    • 56 embedded multipliers
    • 4 PLLs
    • 346 user I/O pins
    • FineLine BGA 484-pin package
  • Memory:
    • SDRAM: One 8Mb Single Data Rate Synchronous Dynamic RAM memory chip
    • 4Mb NOR Flash memory, supports Byte (8-bits)/Word (16-bits) mode
    • SD card socket for both SPI and SD 1-bit mode SD Card access
  • On-board USB Blaster for programming, using the Altera EPM240 CPLD
  • Altera EPCS4 serial EEPROM chip
  • Clock inputs: 50MHz oscillator
  • VGA output uses a 4-bit resistor-network DAC with 15-pin high-density D-sub connector; supports up
    to 1280x1024 at 60Hz refresh rate
  • Serial ports: 1x RS-232 port (Without DB-9 serial connector), 1x PS/2 port (Can be used through
    a PS/2 Y Cable to allow connection of keyboard
    and mouse to one port)
  • Two 40-pin expansion headers

DVI-HSMC Card Features
  • Digital Transmitter:
    • One DVI transmitter with single
      transmitting port
    • Digital Visual Interface (DVI) compliant
    • Supports resolutions from VGA to UXGA
      (25MHz – 165MHz pixel rates)
    • Universal Graphics Controller Interface
    • Enhanced PLL Noise Immunity
    • Enhanced Jitter Performance
  • Digital Receiver:
    • One DVI receiver with single receiving port
    • Supports UXGA Resolution (Output pixel rates up to 165MHz)
    • Digital Visual Interface (DVI) Specification compliant
    • True-color, 24bit/pixel, 16.7M colors at 1 or 2-pixels per clock
    • Laser Trimmed Internal termination Resistors for Optimum Fixed Impedance Matching
    • 4x Over-sampling
    • Reduced Ground Bounce using Time Staggered Pixel outputs
    • Lowest noise and best power dissipation using TI PowerPAD™ packaging
  • Size: 41x78.11mm
Nios II Kit Features
  • LCD daughter card:
    • Color LCD touch-screen display:
      800x480 resolution
    • 24-bit CD-quality Audio CODEC with line-in, line-out, and microphone-in jacks
    • 10/100 Ethernet physical layer/media access control (PHY/MAC)
    • Connectors: VGA output, composite TV-in, audio-out, audio-in, microphone-in, 4-bit SD card, serial connector (RS-232 DB9 port), PS/2, Ethernet connector (RJ-45), 8-pin debug I/O
    • Size: 125x100mm
  • Cyclone III FPGA Starter Kit:
    • Cyclone III EP3C25F324 FPGA
    • Embedded USB-Blaster circuitry (includes an
      Altera EPM3128A CPLD) - allowing download
      of FPGA configuration files via USB port
    • Power and analog devices from Linear Technology: Switching power supply LTM4603EV-1, Switching and step-down regulators LTC3413, LT1959
    • Memory: 32Mb of DDR SDRAM, 1Mb
      of synchronous SRAM, 16Mb of Intel
      P30/P33 flash
    • Clocking: 50MHz, on-board oscillator
    • Nios II Evaluation kit CD-ROM
    • Hardware and software tutorials and
      complete documentation
  • Altera Complete Design Suite DVD: Quartus® II
    Web Edition, ModelSim®-Altera Web Edition, Nios II Embedded Design Suite, MicroC/OS-II real-time operating system evaluation, Nios II C-to-Hardware acceleration compiler evaluation, NicheStack TCP/IP Network Stack - Nios II Edition evaluation, SD/MMC SPI IP Core evaluation licensing avaliable through
    El Camino, MegaCore® IP Library (Library of intellectual property cores)

Cyclone III Video Dev System Features
  • Cyclone III development board:
    • Cyclone III EP3C120F780 FPGA
    • Embedded USB-Blaster circuitry (includes an Altera MAX II CPLD) - allowing download of FPGA configuration files via the flash device
      or the host computer
    • Memory: 256Mb of dual-channel DDR2 SDRAM with ECC, 8Mb of synchronous SRAM, 64Mb
      of flash
    • Communication ports: 10/100/1000
      Ethernet, USB 2.0
    • Clocking: 50MHz and 125MHz
      on-board oscillators
    • Display: 128x64 graphics LCD, 2-line x 16-character LCD
    • Connectors: 2x HSMCs, USB type B
    • Debug tools: 3x HSMC debug cards
      (two loop-back and a debug header)
    • Cyclone III FPGA Development Kit, CD-ROM
    • Altera Complete Design Suite DVD
      (see Nios II Kit Features)
  • DVI-HSMC Card

Altera Cyclone® III FPGAs

Altera Cyclone® III FPGAs offer an unprecedented combination of low power, high functionality, and low cost to maximize your competitive edge. The features and architecture of the Altera Cyclone III FPGA family provides the ideal solution for your high-volume, low-power, cost-sensitive applications. With densities ranging from about 5,000 to 200,000 logic elements (LEs) and 0.5Mb to 8 Mb of memory for less than ¼ watt of static power consumption, Cyclone III device family makes it easier for you to meet your power budget. To address your unique design needs, this FPGA family offers two variants: Cyclone III provides the lowest power and high functionality with the lowest cost. Cyclone III LS provides the lowest power FPGAs with security.
Learn more


Terasic FPGA Development Kits for Altera Cyclone® II


Associated Products
Altera Cyclone II

Terasic FPGA Development Kits for Altera Cyclone II include the DE1 and DE2 Development and Education Boards designed to provide the ideal vehicle for advanced design prototyping in multimedia, storage, and networking. The DE1 and DE2 boards feature the Cyclone® II EP2C20 and EP2C35 FPGAs, respectively. They use state-of-the-art technology in both hardware and CAD tools to expose designers to a wide range of topics. The boards offer a rich set of features that make them suitable for use in a laboratory environment for university and college courses, for a variety of design projects, as well as for the development of sophisticated digital systems.

Altera provides a suite of supporting materials for the DE1 and DE2 boards, including tutorials, "ready-to-teach" laboratory exercises, and illustrative demonstrations. All important components on the boards are connected to pins of these chips, allowing the user to control all aspects of each board's operation.

For simple experiments, the DE1 and DE2 boards each include a sufficient number of robust switches (of both toggle and push-button type), LEDs, and 7-segment displays. For more advanced experiments, there are SRAM, SDRAM, and Flash memory chips on both boards, as well as a 16 x 2 character display on the DE2.

For experiments that require a processor and simple I/O interfaces, it is easy to locate Altera's Nios II processor and use interface standards such as RS-232 and PS/2. For experiments that involve sound or video signals, there are standard connectors for microphone, line-in, line-out (24-bit audio CODEC), video-in (TV Decoder), SD memory card connector, and VGA (10-bit DAC). These features can be used to create CD-quality audio applications and professional-looking video. For larger design projects the DE2 provides USB 2.0 connectivity (both host and device), 10/100 Ethernet, and an infrared (IrDA) port.

Part Number Datasheets Product Featured Device
P0528 DE1 Introduction
DE1 User Manual
DE1 Development
& Education Board
Altera Cyclone II EP2C20
P0301 DE2 Introduction
DE2 User Manual
DE2 Development
& Education Board
Altera Cyclone II EP2C35

Shared Features
  • Built-in USB Blaster for programming and user API controlling
  • JTAG Mode and AS Mode are supported
  • 8Mb (1M x 4 x 16) SDRAM, 4Mb Flash Memory, 512Kb (256Kx16) SRAM,
    SD Card Socket
  • 24-bit CD-Quality Audio CODEC
    with line-in, line-out, and
    microphone-in jacks
  • RS-232 Transceiver and
    9-pin connector
  • PS/2 mouse/keyboard connector
  • Two 40-pin Expansion Headers
    (with diode protection for DE2)
  • Lab CD-ROM which contains many examples with source code
DE1 Features
  • Altera Cyclone II EP2C20F484C7 FPGA with 20000 LEs
  • Altera Serial Configuration devices (EPCS4) for Cyclone II 2C20
  • 4 Push-button switches, 10 DPDT switches
  • 8 Green User LEDs, 10 Red User LEDs, 4 7-segment LED displays
  • 50MHz oscillator, 24MHz oscillator, 27MHz oscillator, and external clock sources
  • VGA DAC (4-bit R-2R per channel) with VGA out connector

DE2 Features
  • Altera Cyclone II EP2C35F672C6 FPGA with 35000 LEs
  • Altera Serial Configuration devices (EPCS16) for Cyclone II 2C35
  • 4 Push-button switches, 18 DPDT switches
  • 9 Green User LEDs, 18 Red User LEDs, 16 x 2 LCD Module
  • 50MHz oscillator and 27MHz (from TV decoder) for clock sources
  • VGA DAC (10-bit high-speed triple DACs) with VGA out connector
  • TV Decoder (NTSC/PAL) and TV in connector
  • 10/100 Ethernet Controller with socket
  • USB Host/Slave Controller with USB type A and type B connectors
  • IrDA transceiver

Altera Cyclone® II FPGAs

Altera Cyclone® II 90nm FPGAs are built from the ground up for low cost and to provide a customer-defined feature set for high-volume, cost-sensitive applications. Cyclone II FPGAs deliver high performance and low power consumption at a cost that rivals that of ASICs. Cyclone II FPGAs extend the low-cost FPGA density range to 68,416 logic elements (LEs) and provide up to 622 usable I/O pins and up to 1.1Mb of embedded memory. Cyclone II FPGAs are manufactured on 300-mm wafers using TSMC's 90nm low-k dielectric process to ensure rapid availability and low cost. By minimizing silicon area, Cyclone II devices can support complex digital systems on a single chip at a cost that rivals that of ASICs. Altera Cyclone II FPGAs offer 60% higher performance and half the power consumption of competing 90nm FPGAs. The low cost and optimized feature set of Cyclone II FPGAs make them ideal solutions for a wide array of automotive, consumer, communications, video processing, test and measurement, and other end-market solutions.
Learn more


DE1 Block Diagram

DE1 Block Diagram
DE2 Block Diagram
DE2 Block Diagram

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