STMicroelectronics SR2 Switch ICs
STMicroelectronics SR2 switch ICs provide a useful feature that ensures inadvertent short reset push-button closures do not cause system resets. This is done by implementing extended Smart Reset input delay time (tSRC) and combined push-button inputs, which together ensures a safe reset and eliminates the need for a specific dedicated reset button. The SR2 has two combined delayed Smart Reset inputs (SR0, SR1) with preset delayed Smart Reset setup time (tSRC). The reset output is asserted after both of the Smart Reset inputs were held active for the selected tSRC delay time. Depending on selected option the RSToutput remains asserted either until at least one SRinput goes to inactive logic level (i.e. neither fixed nor minimum reset pulse width is set) or the output reset pulse duration is fixed for tREC (i.e. factory-programmed). The reset output, RST, is active low or active high, push-pull or open drain with optional pull-up resistor. The device fully operates over a broad VCC range 1.65V to 5.5V. Below 1.57V typ. the inputs are ignored and outputs are deasserted; the deasserted reset output levels are then valid down to 1.0V.