ON Semiconductor NB3N1xx
Fanout Clock and Data Drivers
ON Semiconductor's NB3N1xx Fanout Clock and Data Drivers are a differential Clock fanout buffer with High−speed Current Steering Logic (HCSL) outputs optimized for ultra low propagation delay variation. These devices are designed with HCSL PCI Express clock distribution and FBDIMM applications in mind. Inputs can directly accept differential LVPECL, LVDS, and HCSL signals. Single−ended LVPECL, HCSL, LVCMOS, or LVTTL levels are accepted with a proper external Vth reference supply. These devices specifically guarantee low output-to-output skew. Optimal design, layout, and processing minimize skew within a device and from device to device. System designers can take advantage of their performance to distribute low skew clocks across the backplane or the motherboard.
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Features
- Typical Input Clock Frequencies Include 100, 133, 166, 200, 266, 333, and 400 MHz
- Δtpd 100 ps Maximum Propagation Delay Variation per Diff Pair
- 0.1 ps Typical Integrated Phase Jitter RMS
- Operating Range: VCC = 3.0 V to 3.6 V with VEE = 0 V
- Differential HCSL Output Levels
- LVDS Output Levels with Interface Termination (optional on some devices)
- These are Pb−Free Devices
Applications
- Clock Distribution
- PCIe I, II, III
- Networking and Communications
- High End Computing
- Routers
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