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Home » NEWEST Products » New by Manufacturer » Maxim Integrated » MAXREFDES34 Alcatraz Reference Design - Maxim
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Maxim MAXREFDES34 Alcatraz Reference Design

Maxim MAXREFDES34 Alcatraz Reference Design

Maxim's MAXREFDES34 Alcatraz Reference Design is a subsystem that provides a reference design for securing Xilinx FPGAs to protect IP and prevent attached peripheral counterfeiting. The system implements a SHA-256 challenge-response between the FPGA and a DS28E15 secure authenticator. The DS28E15 communicates over the single-contact 1-Wire® bus, reducing the number of pins necessary to carry out the solution. The reference code defines a combined SHA-256 processor and 1-Wire Master of the host FPGA.

Features
  • SHA-256 authentication
  • Single-contact 1-Wire interface
  • Example source code
  • Pmod™-compatible form factor
  • Crypto-strong authentication
  • Single pin count interface
  • Fast performance with hardware acceleration
Applications
  • Counterfeit protection
  • Peripheral authentication
  • IP protection
  • License and feature management
Block Diagram
Block Diagram
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