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Home » NEWEST Products » New by Manufacturer » Altera Corporation » Altera Cyclone II FPGAs
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Altera Cyclone® II FPGAs

Altera Cyclone® II FPGAs

Altera Cyclone® II FPGAs

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Altera Cyclone® II 90 nm FPGAs are built from the ground up for low cost and to provide a customer-defined feature set for high-volume, cost-sensitive applications. Cyclone II FPGAs deliver high performance and low power consumption at a cost that rivals that of ASICs. Cyclone II FPGAs extend the low-cost FPGA density range to 68,416 logic elements (LEs) and provide up to 622 usable I/O pins and up to 1.1 Mbits of embedded memory. Cyclone II FPGAs are manufactured on 300-mm wafers using TSMC's 90-nm low-k dielectric process to ensure rapid availability and low cost. By minimizing silicon area, Cyclone II devices can support complex digital systems on a single chip at a cost that rivals that of ASICs. Altera Cyclone II FPGAs offer 60% higher performance and half the power consumption of competing 90-nm FPGAs. The low cost and optimized feature set of Cyclone II FPGAs make them ideal solutions for a wide array of automotive, consumer, communications, video processing, test and measurement, and other end-market solutions.

Cyclone II Features
  • High-density architecture with 4,608 to 68,416 LEs
    • M4K embedded memory blocks
    • Up to 1.1 Mbits of RAM available without reducing available logic
    • 4,096 memory bits per block (4,608 bits per block including 512 parity bits)
    • Variable port configurations of ×1, ×2, ×4, ×8, ×9, ×16, ×18, ×32, and ×36
  • Embedded multipliers
    • Up to 150 18- × 18-bit multipliers are each configurable as two independent 9- × 9-bit multipliers with up to 250-MHz performance
    • Optional input and output registers
  • Flexible clock management circuitry
    • Hierarchical clock network for up to 402.5-MHz performance
    • Up to four PLLs per device provide clock multiplication and division, phase shifting, programmable duty cycle, and external clock outputs, allowing system-level clock management and skew control
  • Automotive
  • Consumer
  • Communications
  • Video processing
  • Test and measurement

Cyclone II Product Specifications
Part Number Logic Elements (LEs) M4K RAM Blocks (4 Kbits plus 512 parity bits) Total RAM Bits Embedded Multipliers PLLs
EP2C5 4,608 26 119,808 13 2
EP2C8 8,256 36 165,888 18 2
EP2C15 14,448 52 239,616 26 4
EP2C20 18,752 52 239,616 26 4
EP2C35 33,216 105 483,840 35 4
EP2C50 50,528 129 594,432 86 4
EP2C70 68,416 250 1,152,000 150 4

EP2C20 Block Diagram
EP2C20 Block Diagram

Cyclone 2 LE Figure

Cyclone 2 LE Figure
Altera Cyclone® II FPGA Starter Development Kit

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Altera Cyclone® II FPGA Starter Development Kit

Altera Cyclone® II FPGA Starter Development Kit is ideal for evaluating Altera's high-performance, low-power, 90-nm technology. By using this RoHS-compliant starter development kit, you will see 60 percent (on average) higher performance and 50 percent (on average) lower power than competing 90-nm, low-cost FPGAs. Several reference designs and demonstrations included in the kit make for a quick, "out-of-the-box" evaluation experience.

Starter Kit Features
  • Cyclone II Starter Development Board
  • Cyclone II EP2C20F484C7N device
  • Configuration
    • USB-Blaster™ download cable (embedded)
    • EPCS4 serial configuration device
  • Memory
    • 8-Mb SDRAM
    • 512-Kb SRAM
    • 4-Mb flash
  • Clocking
    • SMA connector (external clock input)
  • Audio
    • 24-bit coder/decoder (CODEC)
  • Switches and indicators
    • Ten switches and four push buttons
    • Four 7-segment displays
    • Ten red and eight green LEDs
  • Connectors
    • VGA, RS-232, and PS/2 ports
    • Two 40-pin expansion ports
    • SD/MMC socket
  • Cables/power
    • Power from USB cable or external power supply (recommended when using the kit with accessory daughtercards, U.S.-style adapter provided)

Starter Board Lay-Out
Starter Board Lay-Out
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  • Altera Corporation
  • Semiconductors|Integrated Circuits|IC-Logic