|    Change Country Change Location USD
United States United States

Please confirm your currency selection:

US Dollars
Home » NEWEST Products » New by Manufacturer » Texas Instruments » TI TMS320C5515 Fixed-Point DSPs
NEWEST Products
TI TMS320C5515 Fixed-Point DSPs
TI TMS320C5515 Fixed-Point DSPs

View Product List

Additional Resources

TI TMS320C5515 Fixed-Point DSPs

Texas Instruments TMS320C5515 Fixed-Point Digital Signal Processors feature a TMS320C5000™ core that achieves low power and high performance through increased parallelism and total focus on power savings. TI TMS320C5515 DSPs support an internal bus structure that is composed of one program bus, one 32-bit data read bus, and two 16-bit data read buses, two 16-bit data write buses, and additional buses dedicated to peripheral and DMA activity. These buses provide the ability to perform up to four 16-bit data reads and two 16-bit data writes in a single cycle. TI TMS320C5515 DSPs include a 10-bit SAR ADC and GPIO functions, providing sufficient pins for status, interrupts, and bit I/O for LCD displays, keyboards, and media interfaces. The peripheral set of these TI Fixed-Point DSPs includes an external memory interface (EMIF) that provides glueless access to asynchronous memories and high-speed, high-density memories. TMS320C5515 DSPs are designed for use in a variety of low-power applications, including wireless audio devices, echo cancellation headphones, portable medical devices, and voice applications.

  • High-Performance, Low-Power, TMS320C55x™ Fixed-Point Digital Signal Processor
    • 16.67-, 13.33, 10-, 8.33-ns Instruction Cycle Time
    • 60-, 75-, 100-, 120-MHz Clock Rate
    • One/Two Instruction(s) Executed per Cycle
    • Dual Multipliers [Up to 200 or 240 Million Multiply-Accumulates per Second (MMACS)]
    • Two Arithmetic/Logic Units (ALUs)
    • Three Internal Data/Operand Read Buses and Two Internal Data/Operand Write Buses
    • Software-Compatible With C55x Devices
    • Industrial Temperature Devices Available
  • 320 K Bytes Zero-Wait State On-Chip RAM, Composed of:
    • 64K Bytes of Dual-Access RAM (DARAM), 8 Blocks of 4K × 16-Bit
    • 256K Bytes of Single-Access RAM (SARAM), 32 Block of 4K × 16-bit
  • 128K Bytes of Zero Wait-State On-Chip ROM (4 Blocks of 16K × 16-Bit)
  • 4M × 16-Bit Maximum Addressable External Memory Space (SDRAM/mSDRAM)
  • 16-/8-Bit External Memory Interface (EMIF) with Glueless Interface to:
    • 8-/16-Bit NAND Flash, 1- and 4-Bit ECC
    • 8-/16-Bit NOR Flash
    • Asynchronous Static RAM (SRAM)
    • SDRAM/mSDRAM (1.8-, 2.5-, and 3.3-V)
  • Direct Memory Access (DMA) Controller
  • Wireless Audio Devices (Headsets, Microphones, Speakerphones, etc.)
  • Echo Cancellation Headphones
  • Portable Medical Devices
  • Voice Applications
  • Industrial Controls
  • Fingerprint Biometrics
  • Software Defined Radio
  • Community Resources

Block Diagram

Block Diagram
  • Texas Instruments
  • Audio
  • Semiconductors|Integrated Circuits|IC-Amplifier|IC-Audio