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Texas Instruments ADS42JB49 ADC

TI ADS42JB49 14-Bit 250-MSPS ADC

Texas Instruments ADS42JB49 14-Bit, 250-MSPS Analog-to-Digital Converter (ADC) is a high-linearity, dual-channel ADC designed to support the JESD204B serial interface with data rates up to 3.125 Gbps. ADS42JB49's buffered analog input offers uniform high impedance through a wide frequency range while minimizing sample-and-hold glitch energy to easily drive analog inputs up to very high input frequencies. An input clock buffer divides by 1, 2, and 4 to enable more flexibility for system clock architecture design. Internal dither algorithms provide excellent spurious-free dynamic range (SFDR) over a large input frequency range.   
 

Features
  • Dual-Channel ADC
  • 14-Bit Resolution
  • Maximum Clock Rate: 250 MSPS
  • JESD204B Serial Interface
    • Subclass 0, 1, 2 Compliant
    • Up to 3.125 Gbps
    • Two and Four Lanes Support
    • Up to 3.125 Gbps
  • Analog Input Buffer with High-Impedance Input
  • Flexible Input Clock Buffer: Divide-by-1, -2, and -4
  • Differential Full-Scale Input: 2 VPP and 2.5 VPP(Register Programmable)
  • Package: 9-mm × 9-mm QFN-64 
  • Power Dissipation: 850 mW/Ch
  • Aperture Jitter: 85 fS rms 3.125 Gbps
  • Internal Dither
  • Channel Isolation: 100 dB
  • Performance
    • fIN= 170 MHz at 2 VPP, –1 dBFS
      • SNR: 73.3 dBFS
      • SFDR: 93 dBc for HD2, HD3
      • SFDR: 100 dBc for Non HD2, HD3
    • fIN = 170 MHz at 2.5 VPP, –1 dBFS
      • SNR: 74.7 dBFS
      • SFDR: 89 dBc for HD2, HD3 and DDR, — ADS42LB49 ADS42LB69 95 dBc for Non HD2, HD3
Applications
  • Communication and Cable Infrastructure
  • Multi-Carrier, Multimode Cellular Receivers
  • Radar and Smart Antenna Arrays
  • Broadband Wireless
  • Test and Measurement Systems
  • Software-Defined and Diversity Radios
  • Microwave and Dual-Channel I/Q Receivers
  • Repeaters
  • Power Amplifier Linearization

Block Diagram
Texas Instruments ADS42JB49 ADC Block Diagram


  • Texas Instruments