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Home » NEWEST Products » New by Manufacturer » Swissbit » DRAM Memory Modules - Swissbit
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Swissbit DRAM Memory Modules

Swissbit DRAM Memory Modules

Swissbit DRAM memory modules are industry standard 200/204-pin 8-byte DDR2/DDR3 SDRAM small outline dual-in-line modules which are organized as x64 high speed CMOS memory arrays. The module uses internally configured octal-bank SDRAM devices. The DDR3 module uses double data rate architecture to achieve high-speed operation. These memory modules operate from a differential clock (CK and CK#). READ and WRITE accesses to the SDRAM modules are burst-oriented; accesses start at a selected location and continue for a programmed number of locations in a programmed sequence. The burst length is either four or eight locations. An auto precharge function can be enabled to provide a self-timed row precharge that is initiated at the end of a burst access. Swissbit DRAM memory modules have a multibank architecture which allows a concurrent operation that is providing a high effective bandwidth. Swissbit uses internally developed application software to test 100% of all modules under real world conditions with diverse pattern and stress methods and to cover the complete memory array including ECC components by constantly adapting to the latest memory controller features. For industrial temperature grade modules the application tests are performed at -40°C and 85°C T AMBIENT.


DDR3 Features
  • 204-pin 72bit DDR3 Small Outline
  • Module organization: single rank 128M x 72
  • VDD = 1.5V ±0.075V, VDDQ 1.5V ±0.075V
  • 1.5V I/O (SSTL_15 compatible)
  • Fly-by-bus with termination for C/A & CLK bus
  • On-board I2C temperature sensor with integrated SPD EEPROM
  • Gold-contact pad

DDR3L Features
  • 204-pin 64bit DDR3 Small Outline
  • Module organization: dual rank 512M x 64
  • VDD = 1.35V and 1.5V
  • VDDQ = 1.35V and 1.5V
  • SSTL_15 compatible
  • Fly-by-bus with termination for C/A & CLK bus
  • On-board I2C temperature sensor with integrated SPD EEPROM
  • Gold-contact pad
DDR2 Features
  • 200-pin 64bit Small Outline
  • Module organization: single rank 128M x 64
  • VDD = 1.8V ±0.1 V, V DDQ 1.8V ±0.1 V
  • 1.8V I/O (SSTL_18 compatible)
  • Auto Refresh (CBR) and Self Refresh 8k Refresh every 64ms
  • Serial Presence Detect with EEPROM
  • Gold-contact pad

  • Swissbit