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Lattice Semiconductor LatticeECP3™ FPGA

Lowest-Power SERDES-Capable FPGA

The LatticeECP3™ third generation high value FPGA from Lattice Semiconductor offers the industry's lowest power consumption and price of any SERDES-capable FPGA device. The LatticeECP3 FPGA family offers multiprotocol 3.2G SERDES with XAUI jitter compliance, DDR3 memory interfaces, powerful DSP capabilities, high density on-chip memory, and up to 149K LUTS - all with half the power consumption and half the price of competitive SERDES-capable FPGAs. These Lattice FPGAs also provide flexible, reliable, and secure configuration options such as dual-boot capability, bit-stream encryption, and TransFR field upgrade features. LatticeECP3™ devices are suitable for high-volume, high-speed, low-cost applications.



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Features
  • Low Power
  • Optimized FPGA Architecture
  • Cascadable sysDSP™ With ALU
  • Advanced Configuration Options
  • High Speed Embedded SERDES
  • Flexible sysIO™ Buffers
  • Wide Range of Package and User I/O Options
  • ECP3 Designs Supported by Dev Boards and Kits
Applications
  • Automotive
  • Industrial
  • Medical Instrumentation



Lattice ECP3™ Selection Guide
Part Number
LUTs (K)
EBR SRAM (Kbits)
EBR SRAM Blocks
Distributed RAM (Kbits)
18x18 Multipliers
3.2Gbps SERDES Channels
Available I/O
PLLs + DLLs
 ECP3-17 17 700 38 36 24 4 222 2+2
ECP3-35
33
1327
72
68
64
4
310
4+2
ECP3-70
67
4420
240
145
128
12
490
10+2
ECP3-95
92
4420
240
188
128
12
490
10+2
ECP3-150
149
6850
372
303
320
16
586
10+2

Lattice ECP3 Block Diagram



Lattice ECP3 FPGA Videos
LatticeECP3™ CPRI

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  • Lattice Semiconductor
  • Semiconductors|IC-Programmable Logic