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Home » NEWEST Products » New by Manufacturer » Intel » WG82583V Gigabit Ethernet Controller - Intel
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Intel WG82583V Gigabit Ethernet Controller

Intel's WG82583V Gigabit Ethernet Controller is a small 9mm x 9mm, 64-pin, quad flatpack no-lead (QFN) silicon package that is ideal for GbE implementations on small form-factor embedded designs. The WG82583V consumes less than 750milliwatts (mW) in GbE mode and less than 300mW in 10/100 mode. The robust design also incorporates optional internal voltage regulation that can reduce the number of voltage supplies required from the platform to power the core and I/O functions. WG82583V offers a fully-integrated Gigabit Ethernet Media Access Control (MAC) and Physical Layer (PHY) port. The WG82583V uses the PCI Express (PCIe) architecture and provides a single-port implementation in a relatively small area so it can be used for server and client configurations as a LAN on Motherboard (LOM) design. The WG82583V can also be used in embedded applications such as switch add-on cards and network appliances.

Additional Resources

Datasheet Datasheet
datasheet Specification Update
Reference Designs
PCI Express Ethernet Networking White Paper

Related Products
82577LM Gigabit Ethernet PHY


Features
  • PCIe x1 Interface
  • PCIe v.1.1 (2.5 GT/s)
  • PCIe advanced extensions
  • Low Power
  • <750 mW S0-Typ (state) 1000Base-T Active 90˚ C (mode) and <300 mW S0-Typ (state) 100Base-T Active (mode)
  • Smart power-down at S0 no link/Sx no link
  • LAN disable function
  • Full wake-up support: advanced power management (formerly Wake on LAN), Advanced Configuration and Power Interface (ACPI), and Magic Packet* wake-up enable with unique MAC address
  • ACPI register set and power down functionality supporting D0 and D3 states
  • Integrated PHY for 10/100/1000 Mbps (megabits per second) for multi-speed, full, and half-duplex operation
  • Descriptor ring management hardware for transmit and receive
  • Legacy and message signal interrupt modes
  • 64-bit address master support for systems using more than 4 GB of physical memory
  • Programmable host memory receive buffer per queue (256 bytes to 16 KB) and cache line size (64 bytes to 128 bytes)
  • Configurable Rx and Tx data FIFO programmable in 1 KB increments
  • Compliant with 1 Gbps (gigabits per second) Ethernet IEEE 802.3, 802.3u, 802.3ab PHY specifications
  • IEEE 802.3x- and 802.3z-compliant flow control support with software-controllable Rx thresholds and Tx pause frames
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  • TCP/UDP, IPv4, and IPv6 checksum offloads; extended Tx descriptors for more offload capabilities
  • TCP segmentation/transmit segmentation offloading
  • IEEE 802.1q virtual local area network (VLAN) support with VLAN tag insertion, stripping and packet filtering for up to 4096 VLAN tags
  • IEEE 802.1q advanced packet filtering
  • Header/packet data split in receive
  • IEEE 1588 protocol and 802.1 as implementation (pre-standard)
  • Three output drivers on the single port to drive external LED circuits
  • Flash interface support
  • MAC/PHY control and status
  • Watchdog timer
Networking Specifications
  • Single Port
  • 10/100/1000Mbps Data Rate Per Port
  • PCIe v1.0a (2.5 GT/s) System Interface Type
  • WoL, PXE Remote Boot Advanced Technologies
  • Jumbo Frames Supported
Advanced Technologies
  • IEEE 1588
Electrical Specifications
  • Typical Targeted Power Dissipation:
    • 750 mW at 1000Base-T active
    • 300 mW at 100Base-T active
  • Operating Temperature: 0˚C to 85˚C
  • Storage Temperature: -40˚C to 125˚C
Package Specifications
  • 9mm x 9mm Package Size
  • Low Halogen Options Available: See MDDS

  • Intel
  • Semiconductors|Integrated Circuits|IC-Communication & Networking