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Intel ICH8 I/O Controller Hubs

Intel ICH8 I/O Controller Hubs

Intel's ICH8 I/O Controller Hubs provide extensive I/O support with functions and capabilities that include PCI Express, PCI Local Bus, ACPI power management, enhanced DMA controller, interrupt controller, and timer functions. These controller hubs include integrated Serial ATA host controllers with independent DMA operation, USB host interface, integrated 10/100/1000 Gigabit Ethernet MAC, system management bus (SMBus), firmware hub (FWH), low pin count (LPC) interface, and serial peripheral interface (SPI) interfaces. These devices support Intel's Active Management Technology, and High Definition Audio.

Additional Resources

Datasheet Datasheet
Specification Update Specification Update
Thermal & Mechanical Design Guide Thermal & Mechanical Design Guide

  • Direct Media Interface with 10Gb/s each direction and full duplex
  • PCI Express with 6 PCI Express root ports that supports PCI Express 1.1
  • PCI Bus Interface which supports PCI Rev 2.3
  • Integrated Serial ATA Host Controller with three SATA ports
  • Integrated IDE Controller with independent timing of up to two drives
  • Intel High Definition Audio Interface
  • USB 2.0 with five UHCI Host Controllers, two EHCI Host Controllers, and up to two USB 2.0 High-speed debug ports
  • Integrated Gigabit LAN Controller with integrated ASF Management Controller that supports IEEE 802.3
  • Power Management Logic which supports ACPI 3.0
  • Intel SpeedStep® Technology ”processor power control" and “Deeper Sleep” power state
  • External Glue Integration
  • Enhanced DMA Controller
  • SMBus with flexible SMBus/SMLink architecture to optimize for ASF
  • High Precision Event Timers

  • Timers Based on 82C54 with system timer, refresh request, and speaker tone output
  • Real-Time Clock which include 256-byte battery-backed CMOS RAM, integrated oscillator components, and lower Power DC/DC Converter implementation
  • System TCO Reduction Circuits
  • Interrupt Controller that supports up to eight PCI interrupt pins and PCI 2.3 Message Signaled Interrupts
  • 1.05V operation with 1.5 and 3.3V I/O that have —5V tolerant buffers on PCI, USB and selected Legacy signals
  • Five Integrated Voltage Regulators for different power rails
  • Firmware Hub I/F supports BIOS Memory size up to 8MBytes
  • Serial Peripheral Interface (SPI)
  • Low Pin Count (LPC) I/F that supports two Master/DMA devices and Security Device (Trusted Platform Module) connected to LPC
  • GPIO that is TTL, Open-Drain, and Inversion

Mobile Configuration
Mobile Configuration

  • Intel