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Home » NEWEST Products » New by Manufacturer » Analog Devices Inc. » ADN2913 IC - Analog Devices
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Analog Devices ADN2913 Continuous Rate Clock and Data Recovery IC w/Integrated Limiting Amp/EQ

Analog Devices ADN2913 Continuous Rate Clock and Data Recovery IC w/Integrated Limiting Amp/EQ

Analog Devices ADN2913 Continuous Rate Clock and Data Recovery IC w/Integrated Limiting Amp/EQ offers the receiver functions of quantization, signal level detection, and clock and data recovery for continuous data rates from 6.5Mbps to 8.5Gbps. The ADN2913 automatically locks to all data rates without the need for an external reference clock or programming. ADN2913 jitter performance exceeds all jitter specifications required by SONET/SDH, including jitter transfer, jitter generation, and jitter tolerance. The LOS detection circuit has hysteresis to prevent chatter at the LOS output. In addition, the input signal strength can be read through the I2C registers. The ADN2913 also supports pseudorandom binary sequence (PRBS) generation, bit error detection, and input data rate readback features. Applications include SONET/SDH OC-1/OC-3/OC-12/OC-48 and all associated FEC rates, 1GE, 1GFC, 2GFC, 4GFC, 8GFC, CPRI OS/L.6 up to OS/L.60, and any rate regenerators/repeaters.

Features
  • Serial data input: 6.5Mbps to 8.5Gbps
  • No reference clock required
  • Exceeds SONET/SDH requirements for jitter transfer/generation/tolerance
  • Quantizer sensitivity: 6.3mV typical (limiting amplifier mode)
  • Optional limiting amplifier, equalizer (EQ), and 0 dB EQ inputs
  • Programmable jitter transfer bandwidth to support G.8251 OTN
  • Programmable slice level
  • Sample phase adjust (5.65 Gbps or greater)
  • Output polarity invert
  • Programmable LOS threshold via I2C
  • I2C interface to access optional features
  • Loss of signal (LOS) alarm (limiting amplifier mode only)
  • Loss of lock (LOL) indicator

  • PRBS generator/detector
  • Application-aware power
    • 352mW at 8.5Gbps, equalizer mode, no clock output
    • 380mW at 6.144Gbps, limiting amplifier mode, no clock output
    • 340mW at 622Mbps, 0dB EQ mode, no clock output
  • Power supplies: 1.2V, flexible 1.8V to 3.3V, and 3.3V
  • 4mm × 4mm, 24-lead LFCSP

Applications
  • SONET/SDH OC-1/OC-3/OC-12/OC-48 and all associated FEC rates
  • 1GE, 1GFC, 2GFC, 4GFC, 8GFC, CPRI OS/L.6 up to OS/L.60
  • Any rate regenerators/repeaters
Functional Block Diagram
Functional Block Diagram
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