Architectural Features
- Simultaneous Read/Write operations
- Flexible bank architecture
- Top and bottom boot sectors in the same device
- Any combination of sectors can be erased
- Manufactured on 0.11 μm Process Technology
- Secured Silicon Region: Extra 256-byte sector
- Zero power operation
- Compatible with JEDEC standards
| Performance Features
- Access time as fast as 55 ns
- Program time: 7 μs/word typical using accelerated programming function
- Ultra low power consumption
- Cycling endurance: 1 million cycles per sector typical
- Data retention: 20 years typical
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