Integrated Device Technology, Inc. delivers system-level innovations that optimize customers' applications and enrich the end-user experience. IDT continues to build on its No. 1 positions in timing, serial switching and memory interfaces to expand its mixed-signal content in Communications, Computing and Consumer applications, driven by three major market drivers including cloud computing, consumer mobility and 4G/LTE. The company's product portfolio has become a fusion of analog and system expertise as well as traditional digital competencies, providing customers with complete application-optimized mixed-signal solutions. The IDT 30+ year heritage and innovation in digital technologies, coupled with its in-house analog talents and capabilities, make IDT the premier analog and digital company.
IDT's IDTP9025A is an integrated single-chip, WPC v1.1-compliant, wireless power receiver IC with advanced WPC v1.1 Foreign Object Detection (FOD). The device converts an AC power signal from a resonant tank into a regulated 5V output voltage, which can be used to supply power to a mobile application. It includes a high-efficiency Synchronous Full Bridge Rectifier and 5V tracking LDO output stage. The device includes the control circuitry required to modulate its load to transmit WPC-compliant message packets to the base station. It uses minimal external components to reduce overall solution area. The IDTP9025A employs advanced programmable FOD techniques to detect foreign metallic objects placed on the transmitter base station based on the transmitted and recevied power transfer.
IDT VersaClock 5 Programmable Clock Generator is intended for high performance consumer, networking, industrial, computing, and data-communications applications. Configurations may be stored in on-chip One-Time Programmable (OTP) memory or changed using I2C interface. The frequencies are generated from a single reference clock. The reference clock can come from one of the two redundant clock inputs. A glitch-less manual switchover function allows one of the redundant clocks to be selected during normal operation. Two select pins allow up to 4 different configurations to be programmed and accessible using processor GPIOs or bootstrapping. The different selections may be used for different operating modes (full function, partial function, partial power-down), regional standards (US, Japan, Europe) or system production margin testing. The device may be configured to use one of two I2C addresses to allow multiple devices to be used in a system.
IDT 8T Series Universal Frequency Translators (UFT) accept 1 or 2 input reference clocks per PLL from 8 kHz to 710 MHz, switching between them as necessary and generates any output frequency from 1 MHz to 1.3 GHz with no frequency translation error in most cases. Family members support either one or two different pin-selectable configurations per PLL that may be pre-loaded into the internal One-Time Programmable (OTP) non-volatile memory for automatic operation directly from powerup, or an I2C serial interface can be used to set the desired configurations. In addition to a crystal input, the UFT features two clock inputs per PLL and provides two outputs per PLL. Each output is individually programmable as LVPECL or LVDS. Versions of the UFT with single-ended outputs are also available. Selection between the two input references per PLL may be performed manually via either pin or register, or it may be performed automatically with revertive or non-revertive recovery.
IDT's IDT8V89317 10G Ethernet PLL & IEEE 1588 Synthesizer is used to frequency synchronize equipment with an Ethernet connected reference or with a GPS based 1PPS reference; its integrated DCO (Digitally Controlled Oscillator) can be controlled by an external IEEE 1588 clock recovery servo to synthesize IEEE 1588-based clocks. The IDT8V89317 ultra-low jitter output clocks can be used to directly time 10 Gigabit Ethernet PHYs and QSGMII devices. The IDT8V89317 synchronization functions are provided by a Digital PLL (DPLL) with an embedded clock synthesizer. The DPLL accepts three single ended reference inputs that can operate at 1PPS (1Hz), 25MHz, 125MHz or 156.25MHz. The references are continually monitored for loss of signal and for frequency offset per user programmed thresholds. The active reference for the DPLL is determined by forced selection or by automatic selection based on user programmed priorities and locking allowances and based on the reference monitors.
IDT's IDT8V89316 Ethernet PLL & IEEE 1588 Synthesizer is used to frequency synchronize equipment with an Ethernet connected reference; its integrated DCO (Digitally Controlled Oscillator) can be controlled by an external IEEE 1588 clock recovery servo to synthesize IEEE 1588-based clocks. The IDT8V89316 low jitter output clocks can be used to directly time Gigabit Ethernet PHYs and QSGMII devices. The IDT8V89316 synchronization functions are provided by a Digital PLL (DPLL) with an embedded clock synthesizer. The DPLL accepts three single ended reference inputs that can operate at 25MHz, 125MHz or 156.25MHz. The references are continually monitored for loss of signal and for frequency offset per user programmed thresholds. The active reference for the DPLL is determined by forced selection or by automatic selection based on user programmed priorities and locking allowances and based on the reference monitors.
IDT's IDT8T79S838-08I 1-to-8 Differential To Universal Output Fanout Buffer is designed for signal fanout of high-frequency clock signals in applications requiring output frequencies generated simultaneously. This fanout buffer has a high clock frequency range (up to 1.5 GHz) which allows use in a wide range of applications. It features low noise with enabler, reduces board space and power consumption allowing the individual outputs to remain enabled. The IDT8T79S838-08I is optimized for 3.3V and 2.5V supply voltages and a temperature range of -40°C to 85°C. The device is packaged in a space-saving 32 lead VFQFN package.
Integrated Device Technology 8P34S High Performance LVDS Clock
Fanout Buffers are a family of clock fanout buffers that accept a clock
or data signal input, and duplicate (fan out) that signal to provide a
high-quality clock or data signal to multiple devices within the system.
The devices' low 1.8 V supply voltage enables designers to reduce power
consumption without sacrificing performance - allowing for higher board
densities and lowering energy and cooling costs. The 8P34S family
supports up to 12 outputs and is pin-to-pin compatible with
higher-voltage versions, making them ideal for use in complex,
low-noise, high-speed clock designs found in wireless and wireline
communications, advanced computing, and networking applications.
Integrated Device Technology's 89H64H16G3 64-Lane, 16-Port PCIe Gen3 System Interconnect Switch is optimized for PCI Express® Gen3 packet switching in high-performance applications, supporting multiple simultaneous peer-to-peer traffic flows. Target applications include servers, storage, communications, embedded systems, and multi-host or intelligent I/O based systems with inter-domain communication. Utilizing standard PCI Express Gen3 interconnect, the 89H64H16G3 provides the most efficient system interconnect switching solution for applications requiring high throughput, low latency, and simple board layout with a minimum number of board layers. Each lane is capable of 8 GT/s of bandwidth in both directions and is fully compliant with PCI Express Base specification 3.0.
IDT IDT8T49N524I Programmable FemtoClock Clock Generator offers an eight output programmable any-rate dual clock generator with selectable LVDS or LVPECL outputs. Both clock generators use Fractional Output Dividers to be able to generate output frequencies that are independent of each other and independent of the input frequency. Output frequencies for both clock generators are generated from a single crystal or reference clock. Clock Generator A supports three different factory-programmed default frequencies that can be selected from using only the FSEL control pins. Alternatively any desired output frequency can be programmed over the I2C serial port. The chosen output frequency is then driven out the QA0 to QA3 outputs. Clock Generator B supports a single factory-programmed default frequency. It can also be programmed for any output frequency via the serial port. The output frequency is driven out the QB0 to QB3 outputs. Excellent phase noise performance is achieved with IDT’s fourth Generation FemtoClock® NG PLL technology, which delivers sub-0.5ps RMS phase jitter in the integer divide mode.
Integrated Device Technology has expanded the line of Qi-Certified Wireless Power Products to include the IDTP9021 Dual-Mode Wireless Power Receiver IC and the IDTP9035 (5V) and IDTP9036 (12V) Single-Chip Wireless Power Transmitter ICs. The IDTP9035 is made for power transmitter design A5 and A11, and the IDTP9036 is made for power transmitter design A6.
Integrated Device Technology 9FGVxxx / 9DBVxxx PCI Express® Timers comprise the world's lowest-power PCI Express timing family. These IDT buffers and synthesizers offer unprecedented power savings and integration for communications, computing, and consumer markets. IDT 9FGVxxx synthesizers and 9DBVxxx buffers consume less than 50mW of power - less than one-tenth the power required by previous solutions. The ultra-low power consumption reduces heat dissipation to ease cooling requirements in large-scale cloud computing applications. These clock synthesizers and buffers are available with either integrated or external termination on the differential outputs. All of these IDT devices meet PCIe Gen 1, Gen 2, and Gen 3 performance requirements, allowing for long-lifecycle designs that customers can re-use through several generations of their products. Most members of this new timing family feature a selectable SMBus address so that multiple devices can seamlessly share the same SMBus segment without the cumbersome additional logic that is often required with other solutions.