What is Coldfire Core Architecture?
In 1994, the innovative ColdFire Microprocessor family was added to Freescale's legacy 68K family tree. This new variable-length RISC 68K family architecture delivers the aggressive price/performance required by the cost-sensitive embedded market. In striving to meet the needs of the market with this innovative architecture, Freescale evaluated high-level source code from many 68K embedded systems customers. Based on the results of this study, a reduced instruction set and addressing modes were identified which created an efficient environment for processor operation. Like most RISC processors, the majority of ColdFire processor instructions execute in a single cycle.
 The variable-length RISC ColdFire architecture gives customers greater flexibility to lower memory and system costs. Because instructions can be 16-, 32- or 48 bits long, code is packed tighter in memory resulting in better code density than traditional 32- and 64-bit RISC machines. More efficient use of on-chip memory reduces bus bandwidth and the external memory required, which results in lower system cost.
Small and inexpensive, the static ColdFire core also lowers system cost because it is completely synthesizable and easily integrated with memories, system modules, and peripherals. Because of its portable nature, the ColdFire core is easily targeted to different process technologies, making it attractive as a product for third-party licensing. Freescale is currently developing strategic alliances with other companies.
With its architectural relationship to the 68K family, customers using 68K products should consider a standard ColdFire product as their next solution. Because the ColdFire processor instruction set is a subset of the 68K family instruction set, existing 68K customers find that designing with ColdFire microprocessors is a smooth transition. Current 68K tool developers should also find that the newest member of the 68K family is easy to support. Moreover, the ColdFire architecture has a product performance roadmap that extends beyond the 68K family to provide 400 MIPS in the year 2001. Thus, ColdFire processors provide a performance path for every member of the 68K Family.
The ColdFire product portfolio offers a wide mix of performance, price, integration and debugging capabilities for embedded designers looking to upgrade their systems. The ColdFire product development tools offers are unmatched. its integration possibilities are limited only by imagination, and its 20-year history of 68K legacy is something no other competitor can offer. With these features to work with, the ColdFire architecture is in a leadership position in the 32-bit embedded space. You are invited to become a part of its success. 
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Target Applications
- Consumer electronics
- Handheld and remote terminals
- Healthcare instruments and monitoring equipment
- Factory automation systems
- Building monitor and control systems
- Security/access systems
- Office/home automation
The ColdFire Advantage - Scalability
- All cores are 100% fully synthesizable
- Configurable
- Generic local-memory controllers support a range of sizes
- Choose size using compiled memory arrays
- Hierarchial architecture
- Multiple buses provide layers of bandwidth + modularity
- Standard internal bus structure provides simple interface
- Design-for-Test -- BIST (Built in Self Test) test methodology for memories
V1 ColdFire® Core Brings 8-bit Ease of Use to 32-bit Performance
Designed for entry-level 32-bit applications, the V1 ColdFire core is a simplified version of the V2 ColdFire core, featuring the same address modes and instruction definitions. It is a memory-configurable hierarchical architecture that is 100-percent synthesizable, specifically designed for reuse and ease of integration into custom designs.
The 32-bit core supports up to 150MHz of performance using a standard cell-based design methodology in a generic 130-nm process technology and interfaces to the System-on-Chip (SoC) using the standard AMBA-AHB bus. The core supports a variable-length RISC architecture that allows instructions to be 16, 32 or 48 bits in length. The result is more efficiently packed code in memory, reducing memory requirements and lowering overall system cost.
The V1 core is an ideal entry point to 32-bit performance. All ColdFire cores (V1, V2, V3 and V4) share the same architecture and instruction set, making upward compatibility to other ColdFire cores a smooth roadmap to higher performance designs.
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